Atomera Inc (ATOM) Q2 2026 Earnings Call Transcript

Hello, everyone, and welcome to Atomera's Second Quarter 2026 Update Call. I'd like to remind everyone that this call and webinar are being recorded, and a replay will be available on Atomera's Investor Relations website for 1 year. I'm Mike Bishop with the company's Investor Relations. As in prior quarters, we are using Zoom, and we will follow traditional format. We will open with prepared remarks from Scott Bibaud, Atomera's President and CEO; and Francis Laurencio, Atomera's CFO. Then we will open the call to questions. If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the Events and Presentations section of our Investor Relations page on our website. Before we begin, I would like to remind everyone that during today's call, we will make forward-looking statements. These forward statements, whether in prepared remarks or during the Q&A, are subject to risks and uncertainties. These risks and uncertainties are detailed in the Risk Factors sections of our filings with the Securities and Exchange Commission, specifically in the company's annual report on Form 10-K filed with the SEC on February 24, 2026. Except as otherwise required by federal securities laws, Atomera disclaims any obligations to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regards to those events, conditions and circumstances. Also, please note, during this call, we will be discussing non-GAAP financial measures as defined by SEC Regulation G. Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today's press release, which is posted on our website. Now I would like to turn the call over to our President and CEO, Scott Bibaud. Go ahead, Scott.

Thanks, Mike, and good afternoon, everyone. Q2 was a quarter of real momentum. Our customer engagements advanced across each of our target markets. We've had promising signs of new markets developing and in GaN, we turned a technical breakthrough into the early stages of a genuine commercial pipeline. Today, I'll move through gate-all-around, our broader customer activity, the growing pull we're seeing in memory, and then I'll spend real time on GaN, where I believe we may be witnessing the opening of a significantly new market for Atomera. Let me start with gate-all-around. By now, you all know why this technology transition is so important. So I'll go straight to the news. We continue to work with 2 of the 4 players in this space. And this quarter, we passed a significant milestone with 1 of the 2 active gate-all-around customers, opening the door to further work on our unique silicon structures. These customers typically ask for a sequence of demonstrations before they'll accept a new material into their process flow. So clearing this stage is a meaningful step rather than a formality. It directly answers the manufacturability questions this customer had put in front of us. We remain in active discussions with the other 2 of our 4 target GAA customers, and our strategic partner continues to provide both the advanced test infrastructure and the ecosystem credibility that enables us to get in the door and helps us to stay there. Memory is an area where interest is clearly accelerating. The large memory manufacturers are under real pressure to add both capacity and performance, and they have the budgets to evaluate options that can help them get there. Up until recently, we had significant interest from DRAM customers focused on our value proposition for planar periphery enhancements. Then suddenly, our customers' direction changed. The major underlying factor was that AI demand accelerated and pushed DRAM manufacturers to the vertical scaling era, including 4F2 and 3D DRAM and other advanced architectures. We can be confident from our interactions, however, that the technical merit of our value proposition for planar periphery is strong. Today, we've established a new value proposition for 4F2 DRAM validated through discussions with multiple customers. We have shown that an MST starting wafer enables a vertical DRAM access transistor to be built using a next-generation DRAM fabrication process that is much cheaper than what most of the DRAM industry is currently pursuing. Our new concept solves fundamental device challenges in 4F2 while offering significant cost savings by leveraging MST's precise doping profile control capabilities. In addition to meeting with customers, we have completed a TCAD simulation study demonstrating its feasibility, and the results have been accepted to be presented at an IEEE conference in September. Traditionally, the technology in NAND flash memory periphery circuits has lagged far behind DRAM, even though NAND memory cells themselves moved to 3D structures many years ago. In the history of Atomera, we have never established a serious value proposition for flash memory. However, that situation may be changing because in the last few weeks, we have learned from a major NAND supplier that AI is now pushing NAND to the point that they need the planar periphery boost that MST can provide. We have spent the last 5 years perfecting this value proposition for DRAM, and now it is applicable to NAND. If adopted by NAND flash manufacturers, this more than doubles the TAM for MST, which would obviously be very commercially significant. Turning to the rest of our pipeline. Our large IDM customer program continues to progress according to plan. We're now at a stage where new device test data is coming in even as the next batch of experiments gets underway. Development efforts are moving fast, and our teams are working closely together. We are also working with other companies and engagements in power and our TrenchFET and HBT development continues to advance, aimed squarely at the efficiency and high-frequency demands emerging from AI data centers. In RF-SOI, wafers are still running with our second JDA partner, and we remain confident they will replicate the positive results we've demonstrated on other customer silicon. Internally, our work on a high-throughput manufacturing process for RF-SOI, where the substrate supply chain is crucial, is also going well and may be applicable to multiple other applications. RF manufacturers have long relied on the characteristics of RF-SOI substrates for switch and LNA performance, but they're also interested in future designs using gallium nitride due to its significant performance advantages, including the potential for fully integrated RF front ends, including power amplifiers. Unfortunately, due to silicon substrate parasitics, GaN RF development has been mostly limited to GaN-on-silicon carbide, which is a very expensive specialty starting wafer, which brings me to the exciting news regarding their preferred starting material, GaN-on-silicon. In our May update call, we shared how MST could help solve parasitic channel problems in GaN-on-silicon, but we hadn't gotten the RF test results that could completely illustrate MST's effect. Later that month, performance data finally arrived, and we announced a technical breakthrough. MST makes GaN-on-silicon for RF devices commercially attractive. Our characterization partner, Incize, has now delivered RF data for MST-enabled GaN-on-silicon that is frankly outstanding. The devices deliver effectively lossless RF together with outstanding harmonic distortion performance, leading to exceptional linearity. At the benchmark drive level, linearity is roughly 1,000x better than the GaN-on-silicon reference, and that improvement remains 2 to 3 orders of magnitude across the full suite of power. We know of no other GaN-on-silicon substrate that can duplicate these findings. Just as important, these results approach the linearity and loss figures of advanced trap-rich RF-SOI, the technology RF designers typically reach for when they need this class of performance. Our partners at Incize independently confirm these benefits on their own world-class baseline, which is exactly the kind of third-party validation customers appreciate. For more details on our GaN-on-silicon test results, please see the white paper on our website. In June, we took this data to IMS, the International Microwave Symposium, and the results were terrific. Our announcement generated real enthusiasm on the show floor. And as a direct result, we are now working with several new potential customers who want to evaluate MST GaN-on-silicon in their own designs. Here's why this matters strategically. Because our GaN-on-silicon results are now approaching RF-SOI class performance, but on a low-cost silicon substrate and with the inherent power and frequency headroom that GaN provides, we believe some designs that would traditionally be built in RF-SOI could instead move to GaN-on-silicon. That would be a meaningful shift in how RF front-end designs get built. And MST's performance may well be the catalyst that sets it in motion. If new RF design activity begins migrating towards GaN-on-silicon, Atomera would be positioned right at the start of a new high-growth market, and it's worth underscoring that MST is the enabler on both sides of that shift. So whichever path the customer chooses, Atomera benefits. To summarize, we cleared a key gate-all-around milestone, established a new next-gen value proposition for DRAM, opened a new front in memory with NAND, kept our pipeline moving across power and RF-SOI and turned our GaN breakthrough into hard RF performance data, real industry enthusiasm and new customers with the potential to seed in an entirely new RF market. This is an exciting time to be at Atomera. With that, I'll turn the call over to our CFO, Frank Laurencio, to review our financials.

Thank you, Scott. At the close of the market today, we issued a press release announcing our results for the second quarter of 2026. This slide shows our summary financials. Revenue in the second quarter was $158,000, consisting of fees for wafer deliveries to customers, primarily to our large IDM customer. Our GAAP net loss for the second quarter of 2026 was $6.3 million or $0.17 per share compared to a net loss of $5 million, also $0.17 per share in the second quarter of 2025. On a non-GAAP basis, our loss for the second quarter was $5 million compared to a loss of $4 million in the second quarter of 2025. GAAP operating expenses were $6.9 million in the second quarter of 2026, an increase of approximately $1.7 million from $5.2 million in the second quarter of 2025. Stock-based compensation, which is excluded from our non-GAAP results, increased by approximately $463,000 year-over-year and was $1.7 million in the second quarter of 2026 compared to $1.3 million in Q2 2025. In the second quarter of 2026, as compared to the prior year period, non-GAAP R&D expenses increased by $188,000, G&A expenses increased by $828,000 and sales and marketing expenses increased by $225,000. The increase in sales and marketing was mainly due to new executive hires in Q4 2025 and Q1 2026. Turning to our sequential results. Second quarter GAAP operating expenses of $6.9 million compared to $6.2 million in the first quarter of 2026. On a non-GAAP basis, operating expenses increased sequentially by $350,000 to $5.1 million in the second quarter from $4.8 million in Q1, primarily reflecting higher G&A expense, offset partly by lower R&D expenses. These sequential fluctuations largely reflected timing of expenses for IP legal costs in G&A, which were heavier in Q2 and outsourced metrology activity in R&D, which was more concentrated in Q1. Our balance of cash, cash equivalents and short-term investments on June 30, 2026, was $38.4 million compared to $41.1 million on March 31, 2026. We used $3.9 million of cash in operating activities in Q2 compared to $4.8 million in Q1 and $3.5 million in Q2 of last year. We did not sell any shares under our ATM during the second quarter of 2026. As of June 30, 2026, we had 39 million shares outstanding. We believe our current cash, which includes $23.6 million of net proceeds from the registered direct offering we closed in Q1, puts us in a strong position to execute on the opportunities ahead of us. And we will continue to be disciplined about controlling costs. However, we are experiencing cost increases, particularly in our outsourced engineering work. The recent very rapid growth in the semiconductor industry has tightened supply and our cost of tool leases, metrology and device fabrication are going up. On our last 2 calls, I said we expected 2026 annual non-GAAP operating expense to be approximately $18.5 million. We budget for a range of plus or minus $250,000 around that number, and we now expect that we will end the year in the high end of that range. With that, let me turn the call back over to Scott for a few summary remarks before we open the call up to questions.

Thanks, Frank. Before we take questions, I want to thank our employees, our customers and our shareholders for their continued support. We're excited about the progress we made this quarter, clearing a key GAA milestone, broadening our memory opportunity into NAND and turning our GaN breakthrough into real RF results. We remain focused on translating our growing body of simulation and customer silicon evidence into commercial agreements that drive long-term repeatable revenue and a strong sustainable business. And we're happy to have you along for the ride. Mike, we will now take questions.

Thank you, Scott. Right now, our first question comes from Richard Shannon of Craig-Hallum.

Let me ask a few questions. There were a lot of interesting comments in your prepared remarks, Scott, so I'll jump into those. First, on gate-all-around: you're characterizing this in a certain way, so please correct me if I'm wrong. I may not have the exact transcription, but I understood that one of your customers has accepted a new material into their ecosystem. Can you explain the importance and difficulty of that? Have you seen similar dynamics in the past in the advanced logic space, and can you compare them? What are the next steps, how many more steps remain, and what has the customer told you they expect you to do and to deliver next?

Okay. Great. Let me clarify the language from your transcription. What we talked about this time is that we've cleared a hurdle with our gate-all-around customers where they have a very complicated structure. What we expect is that gate-all-around customers will ask us to prove that we can deposit MST in a structure like this and both physically and electrically demonstrate positive results over time. One of the milestones that we passed this quarter is that we did show one of those steps. They'll ask us to do a few more. But at some point, when we've deposited our technology into one of their structures, the next step for them is to take it into their own fab and deposit it on their own structure. They'll keep that secret from us; those are the very critical IP steps that they won't share. In order to do that, they would need to take a license from us and then install it on their tool in their fab. So I think that gives a clear example of where we are with them and what's left to be done before they would license it and start working towards production.

Yes.

It's unusual to have a material introduced by a third party like us, but it is more common for a company like Applied Materials, ASM or Lam to introduce a new material to a customer. They might identify a problem and propose a way to use their tool to deposit a material that could solve it. The typical next steps are the OEM demonstrating the capability in their labs, and then a customer asking an OEM to install a multimillion-dollar tool in their factory to test it in their own flow. If they like what they see, they'll buy the tool and more as they scale to production. That gives the OEM a chance to sell tools and gives the customer a way to evaluate without commitment. We don't quite have that flexibility. So for us, the next step for the customer will be to license from us, install our process on one of their tools in their fab and do that testing.

Okay, Scott, does that mean you're currently in some level of negotiation with the end customer here, or do you expect that to start happening soon?

Yes. We've been in discussions with them about what that would imply and what our license terms would look like since we started working with them. As we get close to the end of this demonstration, those discussions will accelerate so we can close the deal. We've already got terms on the table.

Okay. I'm assuming you would expect this to not be a short sales cycle and unclear exactly how long this will take. Is that a fair conclusion? Or any perspective you can offer on time frame and chances of success there?

Yes. I think so far, we've passed a lot of hurdles with them and done some pretty impressive work. If we can complete this cycle and get good electrical results, then we would move on to discussions about installing in the next step. That could happen — it's not going to happen in the next two months, but it could, if things went really well, occur late this year or a little beyond. The other possibility is that we get results they consider good but not great, requiring another round of work, which could stretch it out by another nine months or so. That's why we're hesitant to predict exact timing for closing those deals.

Always makes sense to be conservative there. So that makes a lot of sense. Let's step over to the DRAM space here. Just want to make sure I'm interpreting your comments correctly, Scott, here. It sounds like the technology transition process here within the DRAM space has probably restarted an investigation and testing cycle here. So we're kind of resetting a little bit here. Is that a fair conclusion of what I heard?

In DRAM, yes. The big opportunity for us in DRAM was in the periphery circuits. DRAMs can be broken down into two parts: the memory cell, which is very advanced, and the periphery circuits, which are analog-like circuits that tended to lag the technology node of the memory cells. One reason they lag is they need to contend with variability across a wide set of process conditions and across the whole wafer, and that's something MST can help to solve. We've proven that and published papers and worked with a number of customers on it. What has changed is the emphasis in DRAM manufacturers: AI demand has accelerated and pushed them to consider vertical scaling, including 4F2 and 3D structures. In 4F2, MST's doping control capabilities can help simplify manufacturing and make it more viable and cost-effective. We've presented that to a few customers; they agree with the concept, and we'll move forward with them in the near future.

Okay. Fair enough. On the DRAM space. Now it did sound like if I heard your comments right, you've made some great progress on the planar mechanism within DRAM here that can be applied to the NAND flash space here. So it sounds like that work, while DRAM may be kind of resetting here, it's actually a great dynamic here in the NAND flash. Am I interpreting that correctly?

Yes, exactly. In DRAM, we have a great technology for planar periphery. NAND historically hasn't cared much about planar periphery, but now it suddenly is a pressing issue. All that work we've done for DRAM is now interesting to NAND memory designers. That's an entirely new TAM for us that we hadn't considered before because we didn't see a path into flash previously. NAND manufactures more wafers per year than DRAM, which is meaningful for us since we sell products based on wafer shipments.

Okay. Great. That is helpful on those topics. Let me touch on RF and GaN here, which is really interesting. Again, my transcription of your comments here about getting linearity 1,000x better than the GaN-on-silicon reference seems an amazing accomplishment. And I have never thought that anyone would consider using GaN-on-silicon as a replacement for RF-SOI. And I know that space well enough to know that it goes into a lot of cell phones. So are you basically saying that people are now considering using GaN-on-silicon?

Well, if you've gone to technical conferences for RF-SOI in recent years, many are talking about RF-SOI reaching its maximum performance headroom — in terms of high-frequency performance and handling higher powers. They're exploring ways to continue the roadmap, and GaN is one of the most promising because it handles high-frequency RF and high power much better. We have demonstrated that MST can address the RF problems that previously limited GaN-on-silicon. Historically, GaN-on-silicon carbide has been used for RF, but it's an expensive specialty substrate not suitable for mass-market fully integrated front ends. GaN-on-silicon has the right cost profile but had RF performance issues; our MST-enabled results appear to solve those issues. At the end of May, we published a white paper explaining how MST improves GaN-on-silicon, and subsequent new data — even newer than the white paper — shows incredible improvements in harmonic distortion compared to control GaN-on-silicon wafers.

Okay. It looks impressive from what I understand, which is probably only a small subset of what's really important here, but it seems like a very impressive achievement here.

One last point: RF-SOI has not historically supported power amplifiers because it couldn't handle the high-power performance. Our data, especially in the lower plot we referenced, shows that MST-enabled GaN-on-silicon can handle extremely high power levels. That means you could make a single, fully integrated RF front-end design that includes switches, LNAs and power amplifiers, and that's a key breakthrough.

Interesting. My understanding is that the amount of power amp content versus the RF-SOI is probably leaned toward the power amp side. So if you can include that content in there it would seem to be a big increase in your TAM. Is that how you see it?

I think so. I don't know exactly how much of the power amplifier market this could take over. This is brand-new data, and we haven't dug in as far as we need to yet, but it seems like a very promising opportunity.

Okay. Thinking about where such products might be made here, do you look at companies making RF-SOI today as the obvious place to adopt these solutions? Do we need different infrastructure, different customer base, different material systems, etc., to commercialize this technology?

I don't see the key designers changing much — they understand the marketplace and RF challenges. The manufacturing infrastructure may change if you go to GaN-on-silicon. All of the RF-SOI manufacturers today don't necessarily have GaN-on-silicon capability, but this is something we could work with them to enable by licensing our technology.

Okay. All right. Some great stuff here, Scott. I think Frank is getting a little bored, so I want to gauge in for one question here, a very simple one, Frank, is on the OpEx here. So essentially, are you telling us that your $18.5 million OpEx number is now going to be closer to $21 million for the year? Is that what you're telling us?

No, no. I said plus or minus $0.25 million is kind of how we budget.

$0.25 million?

That is a range of $18.25 million to $18.75 million, and we expect to be closer to the $18.75 million end of that range.

Okay. I got the decimal point in the wrong place here. So I'm glad I asked that question. And then how do we think about go forward from this year? I mean is there any way we would kind of annualize the step-up here? Or any other adds we need to have as we're — it sounds like we're having some great success across a number of different applications. Should we think about $1 million or $2 million step-up as we get to next year?

I'm not giving guidance for next year. But I think what you'll see is, particularly next quarter, some of these structural increases in costs will show up in our P&L and you'll be able to model that going forward. I would characterize the increases as significant from the costs our service providers are imposing on us. We haven't closed negotiations on all of those, and those tend to be long-term contracts. We have two major tool leases to support our development activities, and one of those is still in progress. I'm not ready to say where it's going to come out. We've been spending about $1.8 million a year for one of our tool leases, as disclosed in our 10-Q, and I would expect that to go up pretty significantly. I don't have a final number yet. That will really impact 2027 more than the second half of this year.

That's a good perspective. That's all for me, guys. Congratulations on all the great work here.

Thank you, Richard. And a few questions coming in here on the Q&A line. First of all, is there an update on the PowerAmerica relationship?

Yes. For those not aware, we made a proposal to PowerAmerica earlier this year to partner with a few other companies to develop a GaN power device and testing. Our understanding was that the program would be awarded in May, and we have not heard that we were awarded it. We also haven't received a formal notice that we were not awarded it; however, based on the timing and what I've heard, I presume we were not selected and that other companies were awarded it. Although disappointing, a few points: first, that program was GaN-on-power focused. Earlier this year, we thought GaN-on-power was our primary focus, but with the recent RF test data we've received, we're more focused on GaN-on-RF. So in some ways, it's helpful that my engineering team can focus on the primary RF market. Second, it wasn't a financially significant program for us — the entire program would have only brought in about $300,000 for us if we had won. We'll continue to pursue CHIPS Act and other proposals that benefit our target spaces, but unfortunately that one didn't come through.

Okay, thank you. And is there an update on the relationship with STMicroelectronics?

There's not really an update. Last quarter, we said we were still working with their business units and hoped to put together a deal with them. That's still on the table, but we don't have anything to announce at this time.

Okay, thank you. And a follow-up question on GAA. Specifically, what process does the major milestone at one customer refer to? And then a follow-up to that would be how long does it take? And can it be said to lead into license negotiations?

Yes. The goal of completing this demonstration is absolutely to lead into license negotiations — that's what we hope the next step will be. To clarify: in the early stages of making a gate-all-around transistor, you build a very complicated structure. We need to grow MST conformally along many different structures inside it. Then the customer has to fill with silicon that's doped to a certain level. Every single piece is interdependent: MST affects doping levels and the resulting electrical behavior, and all the pieces must come together to produce a significantly better electrical result. We're working on those depositions and much of the fill work has been done. We're also working on the electrical results we'll ultimately achieve. If we can do that in one try, it will lead to license discussions fairly soon. As I mentioned earlier, it may take more than one try, which could extend the timeline.

Okay. Thanks, Scott. And if you want to proceed with any closing comments, I think that's all the time we have for Q&A right now.

Okay. Well, let me thank you all for joining us to hear the progress within Atomera. Please continue to look for our news, articles, white papers and blog posts, which are available along with investor alerts on our website, atomera.com. Should you have additional questions, please contact Mike Bishop, who will be happy to follow up. And thank you again for your support, and we look forward to our next update call.

Thank you. This concludes the Atomera call.